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LX5241/5242/5243

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The LX5241/42/43 is a multimode SCSI terminator that is compatible with to the SCSI SPI02 (Ultra2 SCSI), SCSI SPI-3 (Ultra3 SCSI or Ultra160 SCSI), and pending SCSI SPI-4 (Ultra320) specifications developed by the T10 standards committee for low voltage differential (LVD) termination, while providing backwards compatibility to the SCSI, SCSI-2, and SPI singleended specifications. Multimode compatibility permits the use of legacy devices on the bus without hardware alterations. Automatic mode selection is achieved through voltage detection on the Diffsense line. The LX5241/42/43 utilizes Linfinity's UltraMAX technology which delivers the ultimate in SCSI bus performance while saving component cost and board area. Elimination of the external capacitors also mitigates the need for a lengthy capacitor selection process. The individual high bandwidth drivers also maximize channel separation and reduce channel to channel noise and cross talk. The high bandwidth architecture insures ULTRA2 performance while providing a clear migration path to ULTRA3 and beyond. When the LX5241/42/43 is enabled, the differential sense (DIFFSENSE) pin supplies a voltage between 1.2V and 1.4V. In application this pin is tied to the DIFFSENSE input of the corresponding LVD transceivers. This action enables the LVD transceiver function. DIFFSENSE is capable of supplying a maximum of 15mA. Tying the DIFFSENSE pin high places the LX5241/42/43 in a HI Z state indicating the presence of an HVD device. Tying the pin low places the part in a single-ended mode while also signaling the multimode transceiver to operate in a single-ended mode. Recognizing the needs of portable and configurable peripherals, the LX5241/42/43 have a TTL compatible sleep/disable mode. During this sleep/disable mode, power dissipation is reduced to a meager 15uA while also placing all outputs in a HI Z state. Also during sleep/disable mode, the DIFFSENSE function is disabled and is placed in a HI Z state. Another key feature of the LX5241/42/43 is the master / slave function. Driving this pin high or floating the pin enables the 1.3V DIFFSENSE reference. Driving the pin low disables the on board DIFFSENSE reference and enables use of an external master reference device.

Auto-Selectable LVD or SingleEnded Termination 3.0pF Maximum Disabled Output Capacitance Fast Response, No External Capacitors Required Compatible with Active Negation Drivers 15A Supply Current in Disconnect Mode Logic Command Disconnects All Termination Lines Diffsense Line Driver Ground Driver Integrated for Single-Ended Operation Current Limit and Thermal Protection Hot-Swap Compatible (SingleEnded) Ultra160 compliant See LX5245/5246 for LVD Termination Only Pin Compatible With DS2119 and UCC5630
IMPORTANT: For the most current data, consult MICROSEMI's website: http://www.microsemi.com

BUS VOLTAGE 6
V(+) VCM
VOD
VOD = V(-) - V(+), Logic = 0 NEGATED
100mV 0V -100mV
V(-)
-
-
LX 5241
+
+
LX 5241

TA (C) 0 to 70 Plastic TSSOP DB 36-Pin LX5241CDBK LX5242CDBK
PW
Plastic TSSOP 24-Pin LX5241CPWK LX5242CPWK
PW
Plastic TSSOP 28-Pin LX5243CPW -
Note: Available in Tape & Reel. Append the letter "T" to the part number. (i.e. LX5241CDBT)
Copyright (c) 2000 Rev. 1.4,2000-11-28
LINFINITY MICROELECTRONICS INC.
11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841, 714-898-8121, FAX: 714-893-2570
1
PRODUCT DATABOOK 1996/1997
LX5241/5242/5243
M U LT I M O D E S C S I T E R M I N AT O R
P
RODUCTION
UltraMAX
D
ATA
S
HEET PACKAGE PIN OUTS
N.C. N.C. N.C. 1+ 12+ 2HEATSINK HEATSINK HEATSINK 3+ 34+ 45+ 5DISCONNECT GND
1 2 3 4 5 6 7 8 9 106 116 126 136 146 156 16 176 186 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
A B S O L U T E M A X I M U M R AT I N G S
(Note 1)
TermPwr Voltage ................................................................................................. +7V Operating Junction Temperature Plastic (DB, PW Packages) .......................................................................... 150C Storage Temperature Range .............................................................. -65C to 150C Lead Temperature (Soldering, 10 seconds) .................................................... 300C
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal.
T H E R M A L D ATA
DB PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA PW PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA 100C/W 50C/W
VTERM HVD LVD SE 99+ 88+ HEATSINK HEATSINK HEATSINK 77+ 66+ DIFF B DIFFSENSE MASTER/SLAVE
Junction Temperature Calculation: TJ = TA + (PD x JA). The JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow.
DB PACKAGE (Top View) LX5241/5242 ("N.C." = No Internal Connection)
MASTER / SLAVE FUNCTION TABLE
MASTER / SLAVE L* H Open (Pull-up) HI Z 1.3V 1.3V DIFFSENSE Status 0mA 15mA Source 15mA Source
* When in Low state, terminator will detect state of DIFFSENSE line.
1+ 12+ 23+ 34+ 45+ 5DISCONNECT GND
1 2 3 4 5 6 7 8 9 106 116 126
24 23 22 21 20 19 18 17 16 15 14 13
VTERM N.C. 99+ 88+ 77+ 66+ DIFFSENSE MASTER/SLAVE
DIFFSENSE / POWER UP / POWER DOWN FUNCTION TABLE
LX5241/5243 LX5242 DISCONNECT DISCONNECT L H DIFF SENSE L < 0.5V Outputs
Status Type
PW PACKAGE (Top View) LX5241/5242 ("N.C." = No Internal Connection)
Quiescent Current 7mA
Enable
S.E.
L
H
0.7 - 1.9V
Enable
LVD
21mA
L H Open
H L Open
H > 2.4V X
Disable Disable
HI Z HI Z
1mA 10A
N.C. 1+ 12+ 2N.C. 3+ 34+ 45+ 5DISCONNECT GND
1 2 3 4 5 6 7 8 9 106 116 126 136 146
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VTERM N.C. 99+ 88+ N.C. 77+ 66+ DIFFB DIFFSENSE MASTER/SLAVE
PW PACKAGE (Top View) LX5243 ("N.C." = No Internal Connection)
2
Copyright (c) 2000 Rev. 1.4 11/00
PRODUCT DATABOOK 1996/1997
UltraMAX
M U LT I M O D E S C S I T E R M I N AT O R
P
RODUCTION
LX5241/5242/5243
D
ATA
S
HEET
(Note 2)
R E C O M M E N D E D O P E R AT I N G C O N D I T I O N S Parameter
Termpwr Voltage LVD SE
Symbol
VTERM
Recommended Operating Conditions Min. Typ. Max.
3.0 3.5 0 0 0 5.25 5.25 5.0 VTERM 70
Units
V V V V C
Signal Line Voltage Disconnect Input Voltage Operating Virtual Junction Temperature Range LX5241C / 5242C / 5243C Note 2. Range over which the device is functional.
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, these specifications apply over the operating ambient temperature range of 0C TA 70C, TermPwr = 4.75V. For the LX5241/5243 DISCONNECT = L, for the LX5242 DISCONNECT = H. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.)
Parameter LVD Terminator Section
TermPwr Supply Current Common Mode Voltage Offset Voltage Differential Terminator Impedance Common Mode Impedance Output Capacitance Output Leakage
Symbol
Test Conditions
LX5241 / 5242 / 5243 Min. Typ. Max.
25 15 1.25 112 105 200 2.5 30 35 1.375 125 110 300 2 1 115 1.2 5.0 1.3 1.4 15.0 200 10
Units
LVD ICC VCM VFSB ZD ZCM CO ILEAK
All term lines = Open LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V Open circuit between - and + (see Note 3) VOUT Differential = -1V to 1V 0V to 2.5V LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V, VLINE = 0 to 4V, TA = 25C LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V, VTERM = 0V, VLINE = 2.7V DIFFSENSE = 1.4V to 0V 1.125 100 100 100
mA A V mV pF A A ms V mA A A
Mode Change Delay
tDF VDIFF IDIFF ISINK(DIFF) ILEAK(DIFF)
DIFFSENSE Section
DIFFSENSE Output Voltage DIFFSENSE Output Source Current DIFFSENSE Sink Current DIFFSENSE Output Leakage VDIFF = 0V VDIFF = 2.75V LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V, TA = 25C All term lines = Open, Master/Slave = 0V All term lines = 0.2V, Master/Slave = 0V LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V VOUT = 0.2V VOUT = 4V, All lines LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V, VOUT = 0 to 4V, TA = 25C LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V, VTERM = Open, VLINE = 2.7V, TA = 25C 2.6 21 45
Single-Ended Termination Section
Termpwr Supply Current SE ICC 7 214 15 2.85 23 65 2.5 10 226 35 24 mA mA A V mA mA pF A A
Terminator Output High Volt Output Current Sink Current Output Capacitance Leakage Current
VO IO ISINK CO ILEAK
2 1
Note 3. Open circuit failsafe voltage.
Copyright (c) 2000 Rev. 1.4 11/00
3
PRODUCT DATABOOK 1996/1997
LX5241/5242/5243
M U LT I M O D E S C S I T E R M I N AT O R
P
RODUCTION
UltraMAX
D
ATA
S
HEET
ELECTRICAL CHARACTERISTICS Parameter Symbol Test Conditions LX5241 / 5242 Min. Typ. Max.
100 150 VTH IIL IIL IIH IIH VTH (MS) IIL (MS) IIH (MS) 0.8 DISCONNECT = 0V DISCONNECT = 0V DISCONNECT = 2.4V DISCONNECT = 2.4V 0.8 MASTER / SLAVE = 0V MASTER / SLAVE = 2.4V 100 100 100 10 2.0 10 2.0 10
Units
C V A nA nA A V A nA
Single-Ended Termination Section (continued)
Ground Driver Impedance Thermal Shutdown ZG I = 1mA
DISCONNECT Section
DISCONNECT Thresholds Input Current LX5241/43 LX5242 LX5241/43 LX5242
MASTER / SLAVE Section
MASTER / SLAVE Thresholds Input Current
BLOCK DIAGRAM
1 of 9
SE 2.85V, 22.5mA
Power ON
VTERM DISCONNECT
Internal VREF 1.30V
S.E. 2.2V
1.07mA
SE DISC/HVD LVD 52.5 LVD 1.25V 200 SE 52.5
HVD
LVD (-) / SE
LVD (+) / SE (Pseudo-GND)
LVD
M/S
10mA 1.07mA
20
DIFFSENSE
MODE Control & Delay LATCH SE
DIFFB
Window Comp. LVD
HVD
SE HVD LVD
Power ON
POWER ON & MODE DELAY
FIGURE 1 -- LX5241/5242 Block Diagram
4
Copyright (c) 2000 Rev. 1.4 11/00
PRODUCT DATABOOK 1996/1997
UltraMAX
M U LT I M O D E S C S I T E R M I N AT O R
P
RODUCTION
LX5241/5242/5243
D
ATA
S
HEET
FUNCTIONAL PIN DESCRIPTION
Pin Designator
1-, 2-, 3-, 4-, 5-, 6-, 7-, 8-, 9-6 VTERM
Description
Negative signal termination lines for LVD mode. Signal termination lines for SE mode. Power supply pin for terminator. Connect to SCSI bus TERMPWR. Must be decoupled by one 4.7F low-ESR capacitor for every three terminator devices. It is absolutely necessary to connect this pin to the decoupling capacitor through a very low impedance (big traces on PCB). Keeping distances very short from the decoupling capacitors to the VTERM pin is also critical. The value of the decoupling capacitor is somewhat layout dependant and some applications may benefit from high-frequency decoupling with 0.1F capacitors right at VTERM pin. Enables / disables terminator. See Power Down Function Table for logic levels per device. Terminator ground pin. Connect to ground. Sometimes referred to as M/S pin in this data sheet. Used to select which terminator is the controlling device. MASTER/SLAVE pin High or Open enables the DIFFSENSE output drive. Please see MASTER/SLAVE Function Table. This is a dual function pin. It drives the SCSI bus DIFFSENS line. It is also the sense pin to detect the SCSI bus mode (LVD, SE or HVD). DIFFSENSE output drive can be disabled with Low level on the MASTER/SLAVE pin. Please see DIFFSENSE and MASTER/SLAVE Function Tables. Internally connected to DIFFB pin through 20kOhm resistor. Internally connected to DIFFSENSE pin through 20kOhm resistor. It can be used as a mode sense pin when the device is a non-controlling terminator (MASTER/SLAVE pin is Low). An RC filter (20kOhm / 0.1F) is not required on the LX5241/42/43, as it has an internal timer. Single-ended output; when High, terminator is operating in SE mode. Low Voltage Differential output. When High, terminator is operating in LVD mode. High Voltage Differential output. When High, terminator is operating in HVD mode. Attached to die mounting pad, but not bonded to GND pin. Pins should be considered a heat sink only, and not a true ground connection. It is recommeneded that these pins be connected to ground, but can be left floating.
1+, 2+, 3+, 4+, 5+, 6+, 7+, 8+, 9+ Positive signal termination lines for LVD mode. Pseudo-ground lines for SE mode.
DISCONNECT6 GND6 MASTER / SLAVE6
DIFFSENSE6
DIFFB6
SE6 LVD6 HVD6 HEATSINK6
Copyright (c) 2000 Rev. 1.4 11/00
5
PRODUCT DATABOOK 1996/1997
LX5241/5242/5243
M U LT I M O D E S C S I T E R M I N AT O R
P
RODUCTION
UltraMAX
D
ATA
S
HEET
A P P L I C AT I O N S C H E M AT I C
TERM POW ER
V
HOST
TERM
P E R IP H E R A L
11+ 11+ V
TERM
TERM POW ER
LX5241 /42 LX5243
D IS C O N N E C T
D IS C O N N E C T M /S GND
D a ta L in e s ( 9 )
99+ 99+
LX5241 /42 LX5243
D IS C O N N E C T
D IS C O N N E C T
D IF F S E N S E D IF F B *
D IF F S E N S E D IF F B *
M /S GND
V 4 .7 F
TERM
11+
11+
V
TERM
LX5241 /42 LX5243
D IS C O N N E C T M /S GND
D a ta L in e s ( 9 )
99+ 99+
LX5241 /42 LX5243
D IS C O N N E C T
4 .7 F
D IF F S E N S E D IF F B *
D IF F S E N S E D IF F B *
M /S GND
V
TERM
11+
11+
V
TERM
LX5241 /42 LX5243
D IS C O N N E C T M /S GND
C o n tr o l L in e s ( 9 )
99+ 99+
LX5241 /42 LX5243
D IS C O N N E C T
D IF F S E N S E D IF F B *
D IF F S E N S E D IF F B *
M /S GND
* D IF F B P in n o t p r e s e n t o n L X 5 2 4 1 /5 2 4 2 C P W
P a c k a g e . M u s t c o n n e c t D IF F S E N S s ig n a l to D IF F S E N S E p in o n P W
package.
FIGURE 2 -- Linfinity ONLY Application Schematic
6
Copyright (c) 2000 Rev. 1.4 11/00
PRODUCT DATABOOK 1996/1997
UltraMAX
M U LT I M O D E S C S I T E R M I N AT O R
P
RODUCTION
LX5241/5242/5243
D
ATA
S
HEET
A P P L I C AT I O N S C H E M AT I C
TERM POW ER
V
HOST
TERM
P E R IP H E R A L
11+ 11+ V
TERM
TERM POW ER
LX5241 /42 LX5243
D IS C O N N E C T
D IS C O N N E C T M /S GND N .C .* P in 1
D a ta L in e s ( 9 )
99+ 99+
LX5241 /42 LX5243
D IS C O N N E C T
D IS C O N N E C T
D IF F S E N S E D IF F B
20k 0 .1 F
20k 0 .1 F
D IF F S E N S E D IF F B
M /S GND N .C .* P in 1
4 .7 F *
4 .7 F *
V
TERM
11+
11+
V
TERM
LX5241 /42 LX5243
4 .7 F
D IS C O N N E C T M /S GND
D a ta L in e s ( 9 )
99+ 99+
LX5241 /42 LX5243
4 .7 F
D IS C O N N E C T M /S GND N .C .* P in 1
D IF F S E N S E D IF F B
D IF F S E N S E D IF F B
N .C .* P in 1
4 .7 F *
4 .7 F *
V
TERM
11+
11+
V
TERM
LX5241 /42 LX5243
D IS C O N N E C T M /S GND
C o n tr o l L in e s ( 9 )
99+ 99+
LX5241 /42 LX5243
D IS C O N N E C T
D IF F S E N S E D IF F B
D IF F S E N S E D IF F B
M /S GND N .C .* P in 1
N .C .* P in 1
4 .7 F *
4 .7 F *
* T h e c a p a c ito r o n P in 1 c a n b e p la c e d o n th e L X 5 2 4 1 C D B , L X 5 2 4 2 C D B o r th e L X 5 2 4 3 C P W
to b e p in - c o m p a tib le w ith o th e r d e v ic e s . T h is V
REG
/R E F c a p a c ito r is n o t r e q u ir e d .
FIGURE 3 -- Suggested Linfinity LX5241/5242/5243 Universal Application Schematic (Please Reference Manufacturer's Current Data Sheet To Ensure Compatibility)
UltraMAX is a trademark of LinFinity Microelectronics Inc.
PRELIMINARY DATA - Information contained in this document is pre-production data, and is proprietary to LinFinity. It may not modified in any way without the express written consent of LinFinity. Product referred to herein is offered in sample form only, and Linfinity reserves the right to change or discontinue this proposed product at any time.
Copyright (c) 2000 Rev. 1.4 11/00
7

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